SY10/100EL16VA-VF are differential receivers. The devices are equivalent to SY10/100EL16 or SY10/ 100EL16V with enhanced capabilities. The QHG, /QHG outputs have a DC gain several times larger than the DC gain of the Q output. The SY10/100EL16VA have an identical pinout to the SY10/100EL16 or SY10/100EL16V. It provides a VBB output for either single-ended application or as a DC bias for AC coupling to the device. The SY10/100EL16VB are very similar to the SY10/ 100EL16VA. The /Q output is provided for feedback purposes. The SY10/100EL16VC provides an /EN input which is synchronized with the data input (D) signal in a way that provides glitchless gating of the QHG and /QHG outputs. When the /EN signal is LOW, the input is passed to the outputs and the data output equals the data input. When the data input is HIGH and the /EN goes HIGH, it will force the QHG LOW and the /QHG HIGH on the next negative transition of the data input. If the data input is LOW when the /EN goes HIGH, the next data transition to a HIGH is ignored and QHG remains LOW and /QHG remains HIGH. The next positive transition of the data input is not passed on to the data outputs under these conditions. The QHG and /QHG outputs remain in their dis- abled state as long as the /EN input is held HIGH. The /EN input has no influence on the /Q output and the data input is passed on (inverted) to this output whether /EN is HIGH or LOW. This configuration is ideal for crystal oscillator applica- tions, where the crystal oscillator provides the clock.
